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Precautions for PCB multilayer design, for reference only

When designing a multi-layer PCB, the following should be paid attention to:

1. The high-frequency signal line must be short and must not have sharp corners (90-degree right angles). The two lines should not be parallel or too close, otherwise parasitic capacitance may occur.

If it is a double-sided board, the lines on one side are laid in horizontal lines, and the lines on the other side are laid in vertical lines. Try not to make slashes.

If automatic routing cannot be used to complete all the wiring, it is recommended that the designer first manually route the more complicated lines, and then lock the routed lines, and then use the automatic routing function. Generally, all the wiring can be completed.

2. The wiring width of the signal line is generally 0.3MM, and the spacing is also 0.3MM. This length is about 10MIL. However, power lines or high-current lines should have sufficient line width and line spacing. The line width is generally 60~80MIL, and the pad should generally be 64MIL. If it is a single-sided board, the pads must be considered, otherwise, generally speaking, the process of producing a single-sided board is very poor, so the pads of the single-sided board should be made as large as possible, and the line width should be as large as possible.

3. Do a good job of shielding high-frequency signals. The ground wire of the copper molded wire should be around the circuit board. At the same time, use copper foil as the ground wire in all the available space on the circuit to enhance its shielding ability and effectively prevent the generation of parasitic capacitance. Because the inner layer of the multilayer board is generally used as the power layer and the lower layer, there is generally no shielding problem. A large area of copper should be changed to a mesh shape to prevent the board from generating bubbles and bending due to thermal stress during soldering.

4. The inner hole size of the pad is as follows:

It must be considered from the diameter of the component lead, the size of the tolerance, the thickness of the coating, the tolerance of the hole diameter, and the thickness of the hole metallization plating layer. Generally, the diameter of the metal pin plus 0.2MM is used as the diameter of the inner hole of the pad. For example, if the diameter of the metal pin of the resistor is 0.5MM, the diameter of the pad hole is 0.7MM, and the outer diameter of the pad should be the pad hole diameter plus 1.2MM, and the minimum should be the pad hole diameter plus 1.0MM. When the diameter of the pad is 1.5MM, in order to enhance the anti-peel strength of the pad, a square pad can be used.

For pads with a hole diameter less than 0.4MM, the pad outer diameter/pad hole diameter is 0.5~3MM. For a pad with a hole diameter of 2MM, the outer diameter of the pad/diameter of the pad hole is 1.5~2MM. In addition, the pad should generally be filled into a teardrop shape, which can greatly enhance the connection strength between the line and the pad.

5. The common impedance interference of the ground wire. The ground wire on a circuit diagram represents the zero potential in the circuit and serves as a common reference point for every other point in the circuit. In the actual circuit, due to the impedance of the ground wire (copper molded wire), it will inevitably cause common impedance interference. Therefore, when wiring, the points with the ground symbol cannot be randomly connected together, which may cause harmful coupling and affect the normal operation of the circuit.


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