The number of PCB layers depends on the PCB space, the number of components, and the planned production cost. Hardware designers usually have only two layers of circuit boards available. In the design of double-layer PCB for automobile, it is necessary to carefully arrange the components of DC switching power supply to meet the requirements of EMC and heat dissipation.

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Design method

In this paper, nine dual layer PCB layouts were tested. Each layout has different component positions and minor changes from the others, as well as different polygon arrangements and through-hole locations (see Figure 1). We tested the nine different layouts to find the best solution to improve EMC and heat dissipation performance. The differences in heat dissipation and EMC performance between these layouts are highlighted below

1: 9 different layouts of PCB panels

Two level layout design suggestions

By following certain design principles, the solution of heat dissipation and EMC optimization can be realized simultaneously. The MPQ4323-AEC1 of MPS is taken as an example (see Figure 2). This DC switching power supply uses a two-layer layout with optimized heat dissipation performance and meets the requirements of automotive EMC CISPR25 Class 5.

Figure 2: Schematic diagram of MPQ4323 conforming to automotive EMC standards with optimized heat dissipation performance

Figure 3 shows the PCB component arrangement based on the above diagram.

Figure 3: Component arrangement of MPQ4323 double-layer PCB

The above recommended layout has a solid top, bottom GND plane, and a large VIN polygon. It also makes use of the PGND crossing hole to connect the top and bottom layers. Figure 4 shows the heat dissipation diagram for this scheme. Y-shaped VIN fins absorb heat at the top level. The PGND through-hole connects the top and bottom layers and acts as a secondary heat sink.

Figure 4: MPQ4323 double layer PCB heat dissipation diagram

Inductors (L3) are also effective radiators (see Figure 4). In this example, the switching node on pin 12 must have a small surface area so that it does not become a transmitting antenna due to rapidly changing voltage (high du/dt). The induction is as close to pin 12 as possible to allow heat to flow into the inductor over the shortest distance. Furthermore, the label side of the inductor winding needs to be aligned with pin 12 for optimal EMC. In this way, the external copper winding of the inductor can shield the noise region within the inductor coil with high du/dt. Figure 5 shows the heat distribution within the device package.

Figure 5: Heat distribution in MPQ4323 package

The most effective pins that transfer heat to the PCB include VIN, PGND, and SW. These pins are connected directly to the upper and lower tube mosFeTs (HS-FET and LS-FET, respectively) through the PCB internal lead frame. The lead frame is welded directly under the chip core to achieve the most efficient heat flow.

The chip is hotter near the MOSFETs because that's where the heat is generated inside. As shown in Figure 4, the white area on the package (up to 67.8°C) is warmer than the magenta area (about 62°C). Copper has a thermal conductivity of 388W/mk, while silicon has a thermal conductivity of 180W/mk. This means that heat is more evenly distributed in the copper. Also, the temperature we measured was on the surface of the package, and the temperature inside the chip was several degrees higher.

The internal length of MOSFET on the lead frame is shorter. Compared with analog pin (BOOT, VCC, AGND, FB, PG and EN) do not have such a high thermal conductivity. Therefore, when designing the layout, the power pins (VIN, PGND, and SW) should have large copper cladding to cool the device, and the top layer near the power pins is the most efficient radiator.

The closer the through-hole between the top and bottom GND is to the power pin, the more efficient the heat flow is. Therefore, we recommend that the hole be arranged in a hot position. But make sure the holes are not too dense. Too many holes can hinder the heat flow of the top layer because there is too little copper covering. It is important that the top layer have direct copper connections for heat flow. At the same time, because of the heat series between the hole and the bottom, the heat dissipation is poor. Therefore, in order to achieve good heat transfer, it is recommended to put the DC switching power supply on the top floor. Figure 6 shows a conventional layout with notches in the GND plane around a DC/DC converter. Meanwhile, the VIN is connected to the bottom layer in a Y shape.

Figure 6: MPQ4323 with traditional layout has less heat flow over PCB

Compare the temperature difference (ΔT) between the maximum TJUNCTION (white area) and TAMBIENT between the two layouts. In the proposed layout for heat dissipation optimization (FIG. 4), ΔT is 40.7°C; In the conventional scenario, the ΔT is 46.8°C.

Our recommended layout is 6°C cooler than conventional layout and does not use additional components or larger board space. Therefore, the heat dissipation performance can be improved by cleverly arranging all 5 power pins, designing a larger VIN area and sufficient PGND crossing holes between top and bottom GND.

MPQ4323-AEC1 compared to similar solutions

Figure 7 compares the like-kind solution (Solution 2) with MPQ4323-AEC1. Note that both devices have the same IC package size and operate on a layout with the same external components

。 

Figure 7: PCB heat dissipation effect of Scheme 2

Table 1 lists the features of the two solutions.

Table 1: MPQ4323 compared to similar solutions

Explanation:

1) Efficiency measurement includes input filter, protection diode and power inductance loss.

The results show that the MPQ4323-AEC1 has a lower temperature with the advanced packaging technology of MPS, which can transfer more heat to the PCB board.

EMC measurement results

FIG. 8 shows the CISPR25 Class 5 standard EMC test results of MPQ4323-AEC1 for conducting and radiating emission in the range of 150kHz to 30MHz.以上翻译结果来自有道神经网络翻译（YNMT）· 通用场景

Figure 8: Conducted emission (150kHz to 108MHz) and radiant emission (150kHz to 30MHz) (pass)

FIG. 9 shows the CISPR25 Class 5 standard EMC test results of MPQ4323-AEC1 for conduction and radiation emission in the range of 30MHz and 200MHz.

Figure 9: Horizontal radiation emission (30MHz to 200MHz) and vertical radiation emission (30MHz to 200MHz) (pass)

FIG. 10 shows the CISPR25 Class 5 standard EMC test results of MPQ4323-AEC1 for both conducted and radiative emission in the range of 200MHz and 1GHz.

Figure 10: Horizontal emission (200MHz to 1GHz) and vertical emission (200MHz to 1GHz) (pass)

Passing automotive grade EMC requirements with only a double-layer PCB design is usually a difficult task, but all EMC measurements for the MPQ4323-AEC1 were below standard requirements. Although 4-layer PCBS are a common standard solution for automotive DC switching power supplies, this undoubtedly adds to the cost. The double-layer PCB solution presented in this paper can also pass the vehicle EMC requirements while maintaining a low temperature rise.

Recommended PCB layout

Figure 10 shows the recommended PCB layout. Its top layer shows that VIN's Y-shaped layout has low impedance and noise. The top layer is not perforated and the conductor is placed near the IC. Simply place the pass hole from top to bottom near the power pin for heat flow.以上翻译结果来自有道神经网络翻译（YNMT）· 通用场景